SoC FPAAs

Okika introduces its state-of-the-art SoC integrated field-programmable analog array (FPAA) IC enabling configurable and programmable analog and digital computation with high count interfacing capabilities.  The 350nm CMOS SoC FPAA IC is based on a Manhattan FPAA architecture, including the array of computation blocks and routing, composed of connection (C) and switch (S) blocks. This configurable fabric effectively integrates analog (A) and digital (D) components in a hardware platform easily mapped toward compiler tools. The switchable analog and digital devices are a combination of the components in the computational analog blocks (CABs), in the computational logic blocks (CLBs), and in the devices in the routing architectures that are programmed to nonbinary levels. The architecture is based on floating-gate (FG) device, circuit and includes an integrated 16-bit MSP430 microprocessor for FPAA management and user software applications.  This SoC FPAA fully integrates customer reconfigurable analog, digital and microprocessor elements enabling both computing and control with rapid reconfigurable analog–digital computation with configurable fabric of interdigitated analog and digital computing blocks to address a wide range of ultralow-power embedded system computational needs. The integration of these different concepts results in a jointly optimized FPAA performance, both in terms of high parameter density (number of programmable elements/area/normalized to process), as well as high accessibility of each of the resulting computations due to its advanced data flow handling.

SoC FPAAs are specifically designed for multi-channel analog mixed-signal processing tasks. They perform coordinated operations such as filtering, amplification, and analog computation directly, without the need for conversion to digital signals. In contrast, FPGA’s require multiple ADC’s and DAC’s to convert analog signals to digital format or back again, introducing latency and potential signal degradation. SoC FPAA process signals directly in analog or mixed-signal domains, maintaining signal integrity, reducing latency, convenient ways to handle dropouts and erroneous signals (noise).  Additionally, Okika’s SoC FPAAs include 10,000 digital FPGA gates and a 16-bit microprocessor, providing the user the capability to perform digital processing alongside your analog processing.  In any application they result in many circuit benefits, including:

•Lower Power Consumption: Using SoC FPAA results in reduced power consumption compared to FPGAs. This makes them particularly advantageous for battery-powered or remote sensing applications. FPGA designs typically result in higher power consumption due to digital processing, switching data in and out of memory and CPU processes, and the need for multiple format conversions between analog and digital domains. Low Power = Longer missions = smaller size=smaller batteries=lower weight.

•Component Functional Integration: SoC FPAA devices can integrate functions. This leads to a smaller overall system footprint, printed circuit board (PCB) design can be simplified, potentially reducing manufacturing complexity and costs.

•Real-time Reconfigurability: Like FPGAs, SoC FPAA chips are reconfigurable, allowing designers to update or change the signal processing functions after deployment and even while in application use. This flexibility can be crucial for adapting to new requirements or improving performance over time in the field.

•Ease of Prototyping: The ability to quickly reconfigure analog functions can accelerate the prototyping phase, enabling faster development cycles.

•Floating-Gate Technology: SoC FPAAs use floating-gate technology, which offers high precision and stability for analog signal processing. This can result in more accurate and reliable measurements in the SPM. FPGA are highly reconfigurable for digital logic but requires separate design efforts for analog front-end circuitry. FPGA Precision depends on the quality of external ADCs and DACs. Stability can be affected by noise and quantization errors in conversions.

•Stability: High precision and stability due to integrated floating-gate technology and analog memory.

•Analog Memory: The inclusion of analog memory allows for the storage of analog coefficients and states, providing enhanced performance for specific signal processing tasks.

 •Offloading Analog Tasks: By handling analog signal processing tasks within the SoC FPAA, the load on the digital processing unit (e.g., microcontroller or DSP) is reduced. This can free up 3 the digital processor to handle more complex or higher-level processing tasks, improving overall system performance.

Monitoring: Programmed with machine learning algorithms the FPAA can:

1. analyze sensor data to detect and classify different types of marine life, pollutants, or other environmental factors.

2. Navigation and Path Planning: The platform can use machine learning to optimize its route based on ocean currents, obstacles, and mission objectives. The FPAA can process real-time data from sonar and other sensors to adjust the glider’s course.

3. Data Compression and Transmission: Efficient data compression algorithms can be implemented on the FPAA to reduce the amount of data that needs to be transmitted to the surface, saving bandwidth and power.

4. Health Monitoring and Diagnostics:  Machine learning can be used to monitor the health of the platform’s systems, predicting failures and scheduling maintenance to ensure long-term