FPAA Wearable Heart Monitoring Without Heavy Power Use

Real-Time Vital Sign Monitoring on FPAA:
Physical-Domain Cardiac Signal Processing for Wearable Systems

Wearable health monitoring systems are limited by one core constraint: continuous sensing consumes power. In most designs, biosignals are captured in analog form, digitized, processed in software, and then transmitted for analysis. Each stage adds energy cost. For always-on operation, this becomes the dominant design problem.

A research team consisting of Sahil Shah, Hakan Töreyin, Cihan Berk Güngör, and Jennifer Hasler explored an alternative approach. Instead of moving signals into the digital domain, they perform computation directly in the analog physical domain using a Field-Programmable Analog Array (FPAA).

Their results show that cardiac signal processing can be maintained continuously at nanowatt to microwatt power levels. This is achieved without a traditional digital signal processing chain.

Why Traditional Wearable Architectures Are Inefficient

Most wearable biosignal systems follow the same structure. Sensors acquire analog signals. An ADC digitizes the data. A microcontroller processes it. Wireless transmission sends the output to external systems.

This architecture is flexible but inefficient for continuous use. Sampling, digitization, and radio transmission dominate power consumption in long-running devices.

The issue is structural. Physiological signals such as ECG, PPG, and blood pressure are inherently analog. They are converted to digital form before feature extraction. This creates unnecessary data movement and repeated computation.

A more efficient approach is to extract features at the sensor node. This reduces both computation and communication overhead.

Computing in the Physical Domain

Physical-domain computation uses circuit dynamics as the processing mechanism. Signal operations are not executed as instructions. They emerge from electrical behavior.

Capacitors introduce integration and filtering effects. Transconductance stages implement differentiation. Current-domain interactions perform multiplication and scaling. Comparator transitions provide threshold detection.

Since biosignals are already analog, this approach avoids repeated conversion steps. Processing occurs as the signal moves through the circuit.

The implementation uses a floating-gate CMOS FPAA developed at Georgia Tech. The architecture is reconfigurable. It behaves similarly to an FPGA in flexibility but operates in continuous-time analog hardware.

Physiological Signal Processing on FPAA

The system processes three primary signals: ECG, arterial blood pressure, and PPG. From these, it derives heart rate, blood pressure estimates, oxygen saturation, and arrhythmia indicators.

Most processing occurs in analog hardware. A lightweight microcontroller handles timing and event logging. It does not perform continuous waveform analysis.

ECG Processing Without Digital Signal Processing

ECG analysis focuses on R-wave detection. These peaks correspond to ventricular depolarization and define heart rate timing.

Instead of a DSP pipeline, the system uses a hysteretic differentiator in subthreshold CMOS. The circuit emphasizes sharp slope changes in the ECG waveform. This makes R-peaks stand out while suppressing baseline drift and noise.

The output is a pulse stream. The microcontroller measures intervals between pulses to compute heart rate. No continuous waveform processing is required.

The method matches MATLAB-based Pan–Tompkins performance while consuming 126 nW for ECG processing.

Blood Pressure Estimation Through Analog Dynamics

Blood pressure extraction uses analog envelope tracking. Systolic and diastolic points are identified through waveform dynamics rather than numerical peak detection.

The circuit tracks extrema using capacitor charge and discharge behavior. These dynamics encode the relevant pressure features directly in the analog domain.

The approach achieves an average systolic error of approximately 6.27% while consuming 251 nW.

Analog Oxygen Saturation Computation

SpO₂ estimation requires combining red and infrared PPG signals. It depends on ratio calculations between AC and DC components.

In this system, those operations are implemented using translinear circuit principles. The circuit extracts signal components, forms ratios, and performs multiplication and division in continuous time.

This reduces reliance on ADC sampling and removes continuous digital computation from the pipeline.

The SpO₂ stage consumes approximately 1.44 μW. Total system power is about 1.82 μW.

Arrhythmia Detection in the Analog Domain

Arrhythmia detection is based on irregularity in R–R intervals.

The circuit tracks interval timing using analog accumulation and adaptive thresholds. Deviations beyond set limits trigger alerts.

The system achieves approximately 96.2% detection sensitivity while remaining within the same ultra-low-power operating range.

FPAA vs Digital Processing

Digital systems represent signal processing as sequences of instructions. Each operation is executed step by step.

In an FPAA, the same functions are implemented through circuit physics.

Integration occurs through capacitor behavior. Differentiation occurs through transconductance. Multiplication arises from current interactions. The computation is continuous rather than clocked.

This removes repeated sampling and instruction overhead. It also reduces energy spent on data movement between blocks.

Implications for Wearable and Edge Systems

The same approach extends beyond cardiac monitoring. Any system that processes continuous analog signals can benefit from early-stage feature extraction.

Instead of transmitting raw data, systems can transmit events or compressed physiological parameters. This reduces bandwidth and power consumption.

It also shifts computation closer to the sensor, which is critical for long-duration wearable and implantable devices.

Conclusion

This work shows that FPAA systems can support continuous biomedical signal processing at extremely low power levels. Feature extraction and event detection can be performed directly in the analog domain.

The result is not just reduced energy consumption. It is a different partitioning of computation between hardware and software.

Floating-gate FPAA architectures combine reconfigurability with physical-domain computation. This makes them suitable for always-on biomedical systems where power is the primary constraint.



While FPAA technology enables ultra-low-power physiological feature extraction for wearable systems, it can also be used in more traditional biomedical instrumentation workflows. In a separate experiment, the Okika FPAA Sing1 was used to implement reconfigurable filtering and heart-rate detection for an EKG measurement system. Read more about this case study here.

Share this article

Latest Stories

View all

FPAA Vestibular Prosthesis for Real-Time Motion Sensing

FPAA Vestibular Prosthesis for Real-Time Motion Sensing

FPAA technology enables real-time vestibular prosthesis signal processing by moving motion sensing and neural stimulation into the analog domain. This reduces digital overhead and lowers power consumption while maintaining precise stimulation control. The result is a reconfigurable, low-power approach to implantable balance restoration systems.

Read more about: FPAA Vestibular Prosthesis for Real-Time Motion Sensing

FPAA Wearable Heart Monitoring Without Heavy Power Use

FPAA Wearable Heart Monitoring Without Heavy Power Use

FPAA technology enables real-time heart monitoring in wearable systems by shifting signal processing into the analog domain, removing the need for power-intensive digital pipelines. Cardiac features are extracted continuously at microwatt to nanowatt power levels, supporting always-on operation. This approach points toward wearable physiological monitoring with dramatically reduced energy consumption.

Read more about: FPAA Wearable Heart Monitoring Without Heavy Power Use

How to Prototype Faster with FPAA Development Boards

How to Prototype Faster with FPAA Development Boards

Analog prototyping is slow due to component variation, layout effects, and repeated hardware iterations. FPAAs speed this up by using pre-characterized analog blocks that are configured in software.

With FPAA development boards, engineers can adjust filters, gain, and signal paths instantly without redesigning hardware. This makes analog iteration faster, more repeatable, and less dependent on PCB revisions.

Read more about: How to Prototype Faster with FPAA Development Boards