Large-Scale Field-Programmable Analog Arrays
Comprehensive IEEE Proceedings overview covering FPAA architecture, history, floating-gate memory, scaling, SoC infrastructure, design tools, and applications.
Read the FPAA Overview →Programmable Analog + Digital Computing
System-on-Chip FPAAs: Programmable Analog and Mixed-Signal Computing
A System-on-Chip Field-Programmable Analog Array, or SoC FPAA, combines configurable analog circuitry, programmable digital logic, embedded processing, data conversion, memory, and routing within a unified mixed-signal platform.
Instead of fixing every filter, amplifier, comparator, signal path, and analog parameter during hardware design, an SoC FPAA allows engineers to configure many of these functions through software and combine them with digital hardware and embedded processing on the same device.
Okika's SoC FPAA technology is designed for reconfigurable analog and digital computation with extensive interfacing options. The architecture provides a platform for adaptive signal processing, programmable sensor interfaces, analog computing, embedded classification, instrumentation, control, and other mixed-signal applications without requiring a new custom IC or analog signal chain for every function.
Start Here
From FPAA to System-on-Chip FPAA
Understanding an SoC FPAA begins with understanding what makes an FPAA different from conventional fixed analog hardware.
What Is an FPAA?
A Field-Programmable Analog Array (FPAA) is an integrated circuit containing configurable analog resources and programmable interconnections. Instead of building every analog function from fixed discrete components, engineers can configure many analog functions after the device has been manufactured.
Depending on the architecture, an FPAA can implement functions such as:
Signal Conditioning
- Amplification
- Filtering
- Signal comparison
- Level and threshold handling
Analog Processing
- Integration
- Analog arithmetic
- Feature extraction
- Waveform generation
Embedded Interfaces
- Sensor interfacing
- Detection
- Control functions
- Adaptive signal paths
What Makes an SoC FPAA Different?
A System-on-Chip FPAA extends programmable analog technology substantially beyond a conventional analog array.
A large-scale SoC FPAA combines a programmable analog fabric with configurable digital logic, embedded processing, memory, converters, I/O resources, routing, and system-level programming infrastructure. Analog hardware, digital hardware, and software can therefore operate as parts of the same mixed-signal system.
The result is not simply a programmable analog front end. It is a reconfigurable mixed-signal computing platform.
One important distinction: an SoC FPAA does not require every useful
signal-processing operation to begin with full analog-to-digital conversion. Filtering,
amplification, comparison, feature extraction, analog computation, and selected control
functions can operate directly on analog signals before or alongside digital processing.
What Makes It a "System-on-Chip"?
The term system-on-chip refers to integrating multiple system functions onto a single integrated circuit. In an SoC FPAA, these resources can include:
- Configurable Analog Blocks
- Configurable Logic Blocks
- Programmable analog routing
- Programmable digital routing
- Analog and digital I/O
- Embedded microprocessor resources
- Program and data memory
- Analog-to-digital conversion
- Digital-to-analog conversion
- On-chip programming infrastructure
A conventional microcontroller-centered system normally surrounds the processor with fixed analog circuitry. An SoC FPAA makes a substantial portion of that analog layer programmable as well.
Inside the Device
How the SoC FPAA Architecture Works
An SoC FPAA is not one large general-purpose analog block. It is a fabric of configurable analog, digital, processing, memory, routing, and interface resources that can be combined to build larger systems.
Analog &
Digital I/O
Digital I/O
CAB
Analog Fabric
Analog Fabric
Programmable
Routing
Routing
CLB
Digital Fabric
Digital Fabric
Processor,
Memory & Interfaces
Memory & Interfaces
Manhattan FPAA Architecture
Okika's current SoC FPAA technology is implemented in a 350 nm CMOS process and uses a Manhattan-style FPAA architecture. Computational blocks are connected through routing infrastructure built around connection blocks and switch blocks.
This arrangement allows analog and digital computational resources to be placed throughout the device and connected through configurable signal paths. The architecture combines analog and digital elements into a structure that can be targeted by system-level compiler tools.
Computational Analog Blocks (CABs)
Computational Analog Blocks contain configurable analog elements that can be combined into larger signal-processing and computational functions.
Depending on the configuration, these resources can contribute to:
- Filters
- Amplifiers
- Integrators
- Comparators
- Oscillators
- Signal detectors
- Analog arithmetic
- Feature extraction
- Sensor interfaces
Higher-level design tools allow engineers to work with functional blocks rather than manually programming every transistor.
Computational Logic Blocks (CLBs)
Computational Logic Blocks provide configurable digital functionality alongside the analog fabric.
Digital resources can support:
- State machines
- Timing and sequencing
- Interface logic
- Digital control
- Signal qualification
- Mixed-signal coordination
The current Okika OTC2902E04-based platform includes 42 CLBs, which Okika describes as equivalent to approximately 10,000 digital FPGA gates.
Programmable Routing
Programmable routing determines how analog blocks, digital blocks, I/O resources, converters, and processing elements connect.
Changing the routing can alter the actual topology and signal flow of the implemented system, not just individual component values.
This is an important distinction between programmability and configurability: parameters can be changed, but so can the structure of the circuit itself.
Floating-Gate Technology
Floating-gate devices provide nonvolatile storage for analog configuration values.
They can establish biases, weights, coefficients, analog parameters, and routing states without requiring continuous external control.
This provides fine-grained analog programmability while allowing configuration values to remain locally stored within the device.
Integrated MSP430 Microprocessor
A 16-bit MSP430 microprocessor is integrated directly into the SoC FPAA architecture.
The processor can support tasks such as:
- Configuration control
- Programming
- Sequencing
- Communications
- Measurement
- System management
- Application-level software
Continuous-time and signal-processing functions can remain in configurable hardware while the processor handles tasks better suited to sequential software.
Data Conversion and Interfaces
Signal DACs, programmable DACs, ADC resources, digital interfaces, and programmable I/O connect the configurable fabric to the surrounding system.
These interfaces allow the SoC FPAA to communicate with sensors, actuators, test equipment, host processors, and other embedded hardware.
Why Programmable Analog?
Why Use an SoC FPAA?
Many embedded systems follow a familiar path: sensor, analog front end, ADC, digital processor, and sometimes a DAC or analog output stage. An SoC FPAA provides another option: selected functions can operate directly in configurable analog hardware before or alongside digital processing.
Lower Power for Appropriate Workloads
Digital signal processing can involve sampling, conversion, data movement, memory access, and repeated digital switching.
When a function can instead be implemented efficiently in analog hardware, the system may reduce the amount of conversion and digital computation required.
This makes programmable analog particularly interesting for battery-operated instrumentation, remote sensors, autonomous systems, distributed monitoring, and always-on detection applications.
Actual power savings depend on the implemented circuit, signal requirements, bandwidth, accuracy, and alternative architecture.
Functional Integration
An SoC FPAA can consolidate analog functions, configurable digital logic, embedded control, routing, and data-conversion resources into a unified device.
This can reduce:
- PCB component count
- Board area
- Inter-device routing
- Supporting circuitry
- Mixed-signal integration complexity
Post-Deployment Reconfigurability
Analog parameters, functional blocks, signal paths, digital logic, and system behavior can be reconfigured after the device has been manufactured.
This can support:
- Multiple operating modes
- Different sensors or signal sources
- Changing signal conditions
- Calibration
- Adaptive processing
- Updated system requirements
Reconfiguration timing and appropriate in-operation behavior depend on the application and programming requirements.
Faster Analog Prototyping
Traditional analog development often requires replacing components or redesigning hardware when the required circuit changes.
With configurable analog hardware, engineers can test different gains, filters, signal paths, computational structures, and processing strategies on the same development platform.
Analog, Digital, and Software Co-Processing
Not every operation belongs in the same computational domain.
Analog hardware can handle continuous-time and signal-domain operations, configurable digital logic can handle selected parallel or timing-sensitive tasks, and the embedded processor can execute sequential software.
The architecture lets engineers partition a system according to the strengths of each domain.
Process Signals Before Full Digitization
Filtering, amplification, threshold detection, feature extraction, and selected computations can take place directly on analog signals.
The goal is not necessarily to eliminate ADCs or digital processors. Instead, the architecture gives designers greater control over where digitization occurs and which operations should happen before it.
Choosing the Right Architecture
SoC FPAA vs. FPGA, MCU, DSP, and Fixed Analog
SoC FPAAs complement rather than universally replace microcontrollers, DSPs, FPGAs, ADCs, or fixed analog circuits. The strongest system may combine several of these technologies.
| Platform | Primary Strength | What Is Programmable | Typical Role |
|---|---|---|---|
| Fixed Analog | Optimized analog implementation of a known function | Normally fixed after manufacture | Stable, fixed-function analog circuitry |
| Microcontroller | Flexible sequential software and control | Program code, registers, and peripherals | Control, communications, embedded applications, user interfaces |
| DSP | High-performance numerical signal processing | Software algorithms and digital processing parameters | Digital filters, transforms, communications, numerical processing |
| FPGA | Parallel configurable digital hardware | Digital logic, routing, state, memory, and interfaces | High-speed digital pipelines, acceleration, communications, custom logic |
| Conventional FPAA | Configurable analog signal processing | Analog functions, analog parameters, and routing | Filters, amplification, signal conditioning, control, analog prototyping |
| SoC FPAA | Integrated analog, digital, and embedded processing | Analog functions, analog parameters, routing, digital logic, and embedded software | Mixed-signal systems, adaptive front ends, analog computing, intelligent sensing, research |
SoC FPAA vs. FPGA
One of the most important distinctions between an FPGA and an SoC FPAA is where the signal processing occurs.
An FPGA fundamentally operates on digital information. Real-world analog signals normally require conversion before the FPGA can process them and may require conversion again when an analog output is needed.
An SoC FPAA contains real analog computational elements and analog signal paths in addition to digital resources. Selected operations can therefore occur natively in the analog domain.
This does not make one platform universally better than the other. A system requiring high-speed digital logic and analog-domain preprocessing may benefit from using an FPAA and FPGA together.
The same applies to MCUs and DSPs: analog hardware can handle operations suited to the physical signal while digital processors focus on software, communications, complex algorithms, system management, or higher-level decision making.
Where the Technology Fits
SoC FPAA Applications
Combining configurable analog hardware, digital logic, embedded processing, and software makes SoC FPAAs applicable to a wide range of mixed-signal development and research problems.
Programmable Signal Conditioning
Configure filtering, amplification, comparison, detection, level handling, and related front-end functions for different signals and operating conditions.
Adaptive Sensor Interfaces
Change gain, bandwidth, thresholds, filtering, and signal paths in response to different sensors or changing environmental conditions.
Software-Defined Instrumentation
Build instruments that can change analog measurement and signal-processing functions through configuration instead of requiring a different fixed signal chain.
Robotics and Autonomous Systems
Perform selected sensor-processing, detection, conditioning, and control functions close to the physical signal while digital processors handle higher-level tasks.
Analog and Physical Computing
Investigate continuous-time computation, dynamical systems, matrix operations, equation solving, and other computational methods implemented through physical analog circuitry.
Biomedical and Wearable Sensing
Published research has explored physiological monitoring, acoustic classification, hemodynamic feature extraction, and wearable sensor processing using FPAA hardware.
Communications and RFID Research
Explore configurable filtering, baseband signal processing, detection, RFID architectures, and other mixed-signal communications applications.
Remote and Distributed Sensing
Perform useful conditioning, detection, or feature extraction locally before transmitting or storing the complete raw signal stream.
Engineering Education
Use one platform to explore analog circuits, embedded systems, mixed-signal design, reconfigurable hardware, signal processing, and analog computing.
Advanced Application Area
Machine Learning and Intelligent Sensing
Machine learning does not always require sending every raw sensor sample to a large digital processor.
Research using SoC FPAA architectures has demonstrated analog and mixed-signal implementations of:
- Filter-bank feature extraction
- Vector-matrix multiplication
- Winner-take-all circuits
- Embedded classifiers
- Speech detection
- Adaptive processing
- Sensor-level feature detection
- Neuromorphic computation
Environmental Monitoring
Configurable analog and mixed-signal processing can analyze sensor signals associated with environmental conditions, biological activity, pollutants, acoustic events, and other physical phenomena.
Local feature extraction or event detection can reduce the amount of raw data that must be stored, processed, or transmitted.
Navigation and Autonomous Platforms
Analog and mixed-signal processing can contribute to systems using sonar, inertial sensing, acoustic data, pressure measurements, environmental sensors, and other continuously varying signals.
Local signal processing can complement digital systems responsible for navigation, planning, communications, or higher-level autonomy.
Data Reduction and Transmission
Remote systems may have limited communications bandwidth and strict energy budgets. Local processing can detect events or extract useful signal features before information is transmitted upstream.
Equipment Health and Diagnostics
Embedded sensing systems can monitor vibration, electrical behavior, acoustic signals, temperature, or other indicators of system health. Programmable feature extraction and classification can support condition-monitoring and predictive-maintenance research.
Neuromorphic Computing
SoC FPAAs have also served as research platforms for neuromorphic systems. Analog computational resources can implement circuit structures inspired by neural systems, while configurable digital resources and embedded processing provide control, communication, and learning functions.
These examples represent research directions and demonstrated applications rather than a claim that an SoC FPAA is a general-purpose replacement for conventional AI accelerators.
From Concept to Hardware
SoC FPAA Design and Programming Workflow
One of the defining features of an SoC FPAA is that complex analog and mixed-signal systems can be developed through a software-controlled design flow rather than entirely through fixed schematic capture and PCB redesign.
1
Define the System
Identify:
- Input and output signals
- Required analog functions
- Digital-control requirements
- Processor tasks
- Signal bandwidth and operating range
- Reconfiguration requirements
- Measurement and testing needs
2
Build the Design
Use the SoC FPAA development environment to assemble analog, digital, I/O, and higher-level functional blocks.
The current tool flow uses Scilab and Xcos as a graphical high-level design environment for constructing mixed-signal systems.
3
Configure Block Parameters
Set application-specific parameters such as:
- Gain
- Bias
- Filter characteristics
- Thresholds
- Weights and coefficients
- Timing
- Signal routing
- Computational parameters
4
Simulate the System
Evaluate the design before programming the physical hardware.
Simulation can help examine signal behavior, system-level relationships, operating ranges, and block interaction before moving to the device.
5
Compile and Map the Design
The toolchain translates the high-level system into the physical resources available on the SoC FPAA.
The current Okika tool flow uses the x2c compiler to move from high-level design descriptions toward a targetable device switch list.
Compilation maps the required analog and digital blocks, routing, switch settings, analog parameters, processor resources, and associated memory configuration.
6
Program the SoC FPAA
The resulting programming data is transferred to the development platform.
Configuration information can include floating-gate programming data, SRAM setup, processor code, routing information, and other resources required by the implemented system.
7
Measure and Validate
Connect the development board to the required sensors, signal sources, test instruments, controllers, or other external systems.
Compare measured results with simulation and application requirements.
8
Refine and Reconfigure
Modify parameters, functional blocks, routing, or embedded software and program the updated design.
Significant changes to the analog and mixed-signal system can therefore be evaluated without rebuilding the entire circuit from discrete hardware.
Research + Training
SoC FPAA Technical Resource Library
Use the categories below to find technical papers, videos, workshops, design resources, and application research according to what you are trying to learn or accomplish.
Many of these resources originate from the Integrated Computational Electronics Laboratory
at Georgia Tech and document the research, architecture, toolchain, and applications that
contributed to large-scale SoC FPAA development. Historical tools and board files are
identified separately from current Okika product and software resources.
I Am New to SoC FPAAs
Start here for broad explanations of FPAA technology, large-scale architecture, device capabilities, and the development of the SoC FPAA platform.
Georgia Tech FPAA Overview
Introductory video covering the broader field-programmable analog concept.
Watch the FPAA Overview →A Programmable and Configurable Mixed-Mode FPAA SoC
Foundational publication describing the mixed-mode SoC FPAA integrated circuit, its analog and digital resources, processor integration, and architecture.
Read the SoC FPAA Paper →Scaling and Potential of FPAA Devices
CICC 2022 invited paper discussing FPAA capabilities and the relationship between configurability, flexibility, cost, and future scaling.
Read the CICC Paper →Projecting Future FPAA Capabilities
Discussion of potential future directions and opportunities for FPAA technology.
Watch the Video →Complete Georgia Tech SoC FPAA Resource Page
Central research page organizing architecture, design tools, machine learning, biomedical applications, education, programming, testing, calibration, and physical-computing resources.
Explore the Full Research Library →I Want to Design and Program an SoC FPAA
These resources cover the current Okika software environment as well as the academic design-tool research that established the Scilab/Xcos and compilation workflow.
Okika SoC FPAA Design Software
Current Okika overview of the SoC toolchain, Scilab/Xcos environment, high-level blocks, compilation, and device programming.
Explore SoC Design Software →An Open-Source Tool Set Enabling Analog-Digital-Software Co-Design
Detailed description of the high-level Scilab/Xcos design environment and the analog-digital-software co-design workflow.
Read the Toolset Paper →An Open-Source ToolSet for FPAA Design
Concise overview of the open-source FPAA targeting infrastructure, including higher-level design and hardware compilation.
Read the Toolset Overview →Circuit-Level Modeling and Simulation
Advanced discussion of circuit-level modeling, simulation, and implementation within the open-source FPAA tool framework.
Read the Simulation Paper →Virtual FPAA Workshop
Practical workshop material covering FPAA concepts, tools, filters, biological-neuron modeling, and classifier examples.
Explore the Workshop →Georgia Tech FPAA Virtual Machine and Tools
Historical Ubuntu virtual-machine and Scilab/Xcos research environment. Use Okika's current software resources for present-day OTC2902K development.
Access the Legacy Tool Site →Academic FPAA Board Design Files
Historical research board schematics, design files, bills of materials, and related academic hardware resources.
Access Board Design Files →Moving from Traditional to Programmable Analog
Discussion of key questions involved in moving from conventional fixed analog design toward programmable and configurable analog systems.
Watch the Video →I Am Researching Machine Learning or Neuromorphic Systems
Explore research using SoC FPAAs for analog feature extraction, vector-matrix computation, winner-take-all classifiers, embedded learning, and neuromorphic systems.
Low-Power Speech Detection on an FPAA
Speech-versus-non-speech detection using analog feature extraction and VMM/WTA classification.
Read the Speech Detection Paper →VMM + WTA Embedded Learning Classifier
Research into a vector-matrix multiplication and winner-take-all learning architecture implementable on SoC FPAA devices.
Read the Learning Algorithm Paper →On-Chip SoC FPAA Machine-Learning Implementation
Hardware-focused implementation of embedded learning and classification on the SoC FPAA platform.
Read the Implementation Paper →Neuromorphic Hardware Roadmap
Broader examination of the architectural challenges involved in creating large-scale neuromorphic hardware systems.
Read the Neuromorphic Roadmap →Complete Neuromorphic Computing Resource Collection
Broader collection of neuromorphic computing publications and research resources maintained by the Georgia Tech ICE Laboratory.
Explore Neuromorphic Resources →We Could Build an Artificial Brain Right Now
IEEE Spectrum discussion placing analog and neuromorphic hardware development into a broader computational context.
Read the IEEE Spectrum Article →I Am Researching Analog or Physical Computing
These resources explore the use of configurable analog hardware for mathematical computation, continuous-time systems, linear-system solutions, filters, and physical-computing frameworks.
Opportunities in Physical Computing Driven by Analog Realization
Foundational discussion of analog realization, physical computation, computational efficiency, and a framework for physical computing.
Read the Physical Computing Paper →Analog Computing Theory as Part of Physical Computing
Video introduction connecting analog computation with the broader physical-computing framework.
Watch the Video →Technical Introduction to Physical Computing
More technical overview of physical computing enabled through analog techniques.
Watch the Technical Introduction →Continuous-Time Configurable Analog Linear-System Solutions
Research into solving systems of linear equations through configurable continuous-time analog hardware.
Read the Linear-System Paper →Analog Solutions of Linear Systems of Equations
Presentation demonstrating analog approaches to solving linear systems.
Watch the Presentation →SoC FPAA-Based Programmable Linear-Phase Analog Filter
Research on ladder-filter-based programmable linear-phase analog filtering implemented using an SoC FPAA.
Read the Filter Paper →Reconfigurable Analog PDE Computation for Baseband and RF
Research exploring configurable analog computation for partial differential equations and related baseband/RF computational problems.
Read the PDE Paper →Complete Physical Computing Collection
Broader Georgia Tech collection of papers and resources focused on physical and analog computation.
Explore Physical Computing Resources →I Am Developing Biomedical or Sensor Applications
Published research demonstrates how configurable analog and mixed-signal hardware can perform sensing, feature extraction, and selected classification functions close to the physical signal.
Reconfigurable Analog Classifier for Knee-Joint Rehabilitation
Research using configurable analog hardware for knee-joint sensing and rehabilitation applications.
Read the Knee-Joint Paper →Acoustic Knee Classification
Proof-of-concept research classifying acoustic signals generated by the knee joint using an FPAA.
Read the Acoustic Classification Paper →Hemodynamic Feature Extraction
Mixed-signal FPAA implementation for energy-efficient, real-time feature extraction from bioimpedance signals.
Read the Hemodynamic Paper →Real-Time Vital-Sign Monitoring
Research into real-time vital-sign monitoring in the physical domain using a mixed-signal reconfigurable platform.
Read the Vital-Sign Paper →I Am Teaching or Learning FPAA Design
These resources support educators, students, and researchers learning configurable analog design and mixed-signal system development.
Virtual FPAA Workshop
Online workshop covering introductory FPAA concepts, software tools, filter examples, neuron modeling, and classifier exercises.
Open the Workshop →Transforming Mixed-Signal Circuits Classes through SoC FPAA
Paper discussing the use of the SoC FPAA IC, development board, and toolset in mixed-signal engineering education.
Read the Education Paper →SoC FPAA-Immersed Junior-Level Circuits Course
Examination of SoC FPAA devices as part of junior-level circuits education.
Read the Course Paper →Remote FPAA System
Conference paper describing a remote FPAA platform designed to make configurable-device experimentation more widely accessible.
Read the Remote-System Paper →Extended Remote-System Publication
Longer treatment of the remote-system architecture and its use for accessible configurable analog development.
Read the Extended Paper →FPAA for Education and Research
Okika's education and research resources, including information for universities, laboratories, faculty, students, and academic users.
Explore Education & Research Resources →I Am Studying Programming, Calibration, Testing, or Reliability
Advanced engineering resources covering the programming infrastructure and practical behavior of configurable analog systems.
Integrated Floating-Gate Programming Environment
Detailed explanation of the programming infrastructure used for system-level floating-gate integrated circuits and SoC FPAA configuration.
Read the Programming Paper →SoC FPAA Built-In Self-Test
Research into built-in self-test approaches for configurable mixed-signal hardware.
Read the BIST Paper →Initial SoC FPAA Calibration Research
Conference research addressing calibration techniques for large-scale configurable analog systems.
Read the Calibration Paper →Extended SoC FPAA Calibration Study
Longer publication exploring calibration of configurable analog and mixed-signal hardware.
Read the Extended Calibration Paper →FPAA Design Techniques for Temperature Behavior
Research examining design methods for reducing temperature sensitivity in configurable analog systems.
Read the Temperature Design Paper →Models and Techniques for Temperature-Robust Systems
Extended research into temperature modeling and robust analog design on a reconfigurable platform.
Read the Temperature Modeling Paper →Security for Configurable FPAA Devices
Research exploring security considerations associated with programmable and configurable analog and mixed-mode systems.
Read the Security Paper →I Am Exploring Advanced and Emerging Research
These resources extend beyond the primary product workflow into device scaling, analog design methodology, RFID, cryogenic electronics, and other research directions.
Scaling Floating-Gate Devices
Research examining how floating-gate devices and FPAA architectures may scale from 350 nm toward smaller CMOS processes.
Read the Scaling Paper →Analog Standard-Cell Libraries for Mixed-Signal Computing
Research exploring how FPAA design concepts may inform analog standard-cell methodology and mixed-signal design abstraction.
Read the Analog Standard-Cell Paper →Programmable and Configurable Techniques for Low-Voltage RFID
Video examining potential programmable analog approaches to low-voltage RFID systems.
Watch the RFID Video →Analog AI for Cryogenic and Quantum Applications
Research presentation discussing analog approaches in cryogenic and quantum-control contexts.
Watch the Cryogenic Computing Talk →Floating-Gate Devices at Cryogenic Temperatures
Demonstration of floating-gate circuit behavior at cryogenic temperatures.
Watch the Demonstration →Further SoC FPAA Papers and Resources
Full Georgia Tech collection for users who want to explore beyond the curated resource paths presented on this page.
Browse All SoC FPAA Resources →Historical Media Coverage
These articles document the early public introduction of the large-scale SoC FPAA research platform. Performance claims in the article titles refer to specific research comparisons and demonstrations and should not be interpreted as universal performance specifications for every application.
Electronic Products: New Analog Chip Uses 1,000 Times Less Electrical Power
Historical media coverage of early SoC FPAA research and its demonstrated analog-computing capabilities.
Read the Electronic Products Article →Georgia Tech: Configurable Analog Chip Computes with 1,000 Times Less Power than Digital
Georgia Tech Research Horizons coverage of the original SoC FPAA research.
Read the Georgia Tech Article →Build with SoC FPAA Technology
Develop with the Okika OTC2902K
The OTC2902K development board provides access to the OTC2902E04 SoC FPAA and its configurable analog, digital, processor, conversion, and development resources.
56 CABs
Configurable Analog Blocks
42 CLBs
Configurable Logic Blocks
~10,000
Equivalent Digital FPGA Gates
16
Signal DACs
6
Programmable DACs
Ramp ADC
Integrated Conversion Resource
16-bit MSP430
Integrated Microprocessor
Analog + Digital
Programmable Routing
Scilab / Xcos
SoC Design Workflow
The platform is intended for engineers, researchers, universities, and development teams investigating configurable analog systems, mixed-signal computing, signal processing, embedded classification, sensor interfaces, physical computing, and related applications.
↑ Back to topFrequently Asked Questions
SoC FPAA FAQ
What does SoC FPAA stand for?
SoC FPAA stands for System-on-Chip Field-Programmable Analog Array. It combines configurable analog resources with digital logic, embedded processing, memory, converters, routing, and programming infrastructure.
What is the difference between an FPAA and an SoC FPAA?
A conventional FPAA primarily provides configurable analog functions and routing. A large-scale SoC FPAA extends this architecture with more extensive analog resources as well as programmable digital logic, embedded processing, memory, conversion, interfaces, and system-level design tools.
How is an SoC FPAA different from an FPGA?
An FPGA primarily configures digital logic and digital routing. An SoC FPAA contains real analog computational resources and analog signal paths alongside configurable digital resources.
Analog behavior such as signal range, bandwidth, noise, distortion, loading, bias, and continuous-time response therefore remains part of the SoC FPAA design.
Does an SoC FPAA replace an FPGA, MCU, or DSP?
Not necessarily. SoC FPAAs can complement microcontrollers, FPGAs, DSPs, and other processors.
The FPAA can handle functions suited to configurable analog or mixed-signal hardware, while other processors handle software, communications, high-speed digital logic, complex numerical algorithms, or higher-level system management.
Does an SoC FPAA eliminate the need for an ADC?
No. Some applications can process, condition, detect, or reduce information before full digitization, but an ADC is still required whenever the system needs digital samples.
The advantage is architectural flexibility: engineers can choose where digitization occurs and which operations should happen before it.
What can be changed after the device is manufactured?
Depending on the implemented design and available resources, engineers can change analog parameters, functional blocks, routing, digital logic, embedded software, operating modes, and overall signal flow.
What is floating-gate technology used for?
Floating-gate devices provide nonvolatile storage for analog and configuration values. They can store parameters such as biases, weights, coefficients, and routing states directly within the configurable system.
What software is used to design an Okika SoC FPAA system?
Okika's current SoC FPAA toolchain uses a high-level design environment based on Scilab and Xcos. The flow supports analog, digital, I/O, and complex functional blocks and compiles the design toward a configuration that can be programmed onto the target FPAA.
Is SoC FPAA design software required?
Yes. The design and compilation tools are used to convert the system description into the configuration and programming data required by the SoC FPAA hardware.
Can an SoC FPAA be reconfigured after deployment?
The architecture supports reconfiguration after hardware manufacturing and deployment. The appropriate method and timing depend on the application, configuration process, and system requirements.
Who should consider an SoC FPAA?
The technology is particularly relevant to:
- Analog and mixed-signal engineers
- Embedded-system developers
- Signal-processing researchers
- Neuromorphic-computing researchers
- Sensor and instrumentation developers
- Robotics and control engineers
- Analog-computing researchers
- Universities and teaching laboratories
- Teams evaluating programmable analog architectures
Make the Analog System Programmable
Explore, Design, and Build with SoC FPAA Technology
SoC FPAAs extend programmability beyond software and digital logic into the analog signal path itself. Explore the architecture, study the research, download the design tools, or begin developing with the OTC2902K platform.